360 Assembly/360 Instructions

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There are several types of instructions on the 360, 370 and z/System type mainframes. Instructions in the Available column which are marked All are available on all models. Otherwise the instruction is only available on the System/370 and z/System machines. Where "base-displacement" address is used, it means either an indexed base-displacement address, which consists of the value of a base register, an index register, and an unsigned 12-bit displacement address, or an unindexed base-displacement where only the base register and the 12-bit displacement address are used. A base-displacement address is presumed to be indexed unless specified as unindexed. The instruction types are:

Instruction Format
Instruction
Type
First Halfword Second Halfword Third Halfword Available
on Models
Size in
Bytes
Meaning
Bits (0-7) (8-12) (13-15) (16-19) (20-23) (24-27) (28-31) (32-35) (36-39) (40-47)
SVC OpCode I All 2 The SVC instruction is a special class of the RR instruction, where the low 8 bits are used as an immediate value from 0 to 255.
E OpCode S/370 2 E, Modified RR instruction, op code is 16 bits and has no arguments.
RR OpCode R1 R2 All 2 RR Instructions use 2 registers for the arguments.
RRE OpCode / / / / / / / / R1 R2 S/370 4 RRE, consisting of 2 registers and 8 unused bits.
RRF OpCode R1 / / / / R3 R2 S/370 4 RRF, consisting of 3 registers and 4 unused bits.
OpCode M3 / / / / R1 R2 S/370 4 RRF, consisting of 2 registers, a mask and 4 unused bits.
OpCode R3 M4 R1 R2 S/370 4 RRF, consisting of 3 registers and a mask.
RX OpCode R1 X2 B2 D2 All 4 RX Instructions use one register and an index register plus base-displacement address.
RXE OpCode R1 X2 B2 D2 / / / / / / / / OpCd S/370 6 RXE, consisting of an expanded RX format instruction with an additional op code and 8 unused bits.
RXF OpCode R3 X2 B2 D2 R1 / / / / OpCd S/370 6 RXE, consisting of an expanded RX format instruction with an additional register, an additional op code and 4 unused bits.
RS OpCode R1 R3 B2 D2 All 4 RS, consisting of two registers and an unindexed base-displacement address to reference a single string.
OpCode R1 M3 B2 D2 4 RS, consisting of one register, a 4-bit mask and an unindexed base-displacement address to reference a single string.
RSE OpCode R1 R3 B2 D2 / / / / / / / / OpCd S/370 6 RSE, consisting of an expanded RS format instruction of with an additional op code and 8 unused bits, one register, and an unindexed base-displacement address to reference a single string.
OpCode R1 M3 B2 D2 / / / / / / / / OpCd S/370 6 RSE, consisting of an expanded RS format instruction of with an additional op code and 8 unused bits, a 4-bit mask, and an unindexed base-displacement address to reference a single string.
RSL OpCode L1 / / / / B2 D2 / / / / / / / / OpCd S/370 6 RSL, consisting of an expanded RS format instruction with an additional op code and 12 unused bits.
RSI OpCode R1 R3 I2 S/370 4 RSI, consisting of an instruction with two registers and a 16-bit immediate value.
RI OpCode R1 OpCd I2 S/370 4 RI, consisting of an instruction with a register, an additional op code, and an additional 16-bit immediate value.
RIL OpCode R1 OpCd I2 S/370 6 RIL, consisting of an instruction with a register, an additional op code, and an additional 32-bit immediate value.
SI OpCode I2 B1 D1 All 4 SI, consisting of an 8-bit immediate value and an unindexed base-displacement address.
S OpCode B2 D2 S/370 4 S, containing a single unindexed base-displacement address.
SS OpCode L B1 D1 B2 D2 All 6 SS, instructions which use a 1 byte length, and two unindexed base-displacement addresses to reference two strings with a length of up to 256 bytes.
OpCode L1 L2 B1 D1 B2 D2 6 SS, instructions which use two unindexed base-displacement addresses to reference two strings each with their own specified length of up to 16 bytes.
OpCode R1 R3 B1 D1 B2 D2 6 SS, instructions which use two registers and two unindexed base-displacement addresses to reference two strings.
SSE OpCode B1 D1 B2 D2 S/370 6 SSE, containing two unindexed base-displacement addresses.

All instructions must be aligned to an even address. Attempts to create an instruction at an odd address will be flagged as an error by the assembler; an attempt to branch to an odd address will result in a program check.

There are three classes of instructions. 360 instructions are those which were part of the original IBM 360 mainframe instruction set, they are shown on the table below in this color: [       ]. 370 instructions were added with the creation of the IBM 370, they are shown on the table below in this color: [       ] are only available on 370 and higher series machines, and will cause a program check if they are attempted to be executed on a 360. z/System instructions were created after the 370, they are shown on the table below in this color: [       ] and will not work on 360 or 370 hardware, only on z/System machines.

In general, there are seven types of instructions:

The table shown below can be sorted on any of its columns by clicking on the symbol at the top of that column.

Opcode
(Hex)

Mnemonic

Description
Type of
Instruction
Class of
Instruction
0101 PR Program Return E Branch Instructions  
0102 UPT Update Tree E Data Transfer Instructions  
0107 SCKPF Set Clock Programmable Field E Other Instructions  
010B TAM Test Addressing Mode E Control Flow Instructions  
010C SAM24 Set Addressing Mode (to 24 bits) E Control Flow Instructions  
010D SAM31 Set Addressing Mode (to 31 bits) E Control Flow Instructions  
010E SAM64 Set Addressing Mode (to 64 bits) E Control Flow Instructions  
01FF TRAP2 Trap E Control Flow Instructions  
04 SPM Set Program Mask RR Other Instructions  
05 BALR Branch And Link Register RR Branch Instructions  
06 BCTR Branch on CounT Register RR Branch Instructions  
07 BCR Branch on Condition Register RR Branch Instructions  
070 NOPR No Operation Register RR Branch Instructions  
07F BR Branch Register (Unconditional) RR Branch Instructions  
08 SSK Set Storage Key RR 360 Only Privileged Instructions  
09 ISK Insert Storage Key RR 360 Only Privileged Instructions  
0A SVC SuperVisor Call I Control Flow Instructions  
0B BSM Branch and Set Mode RR Branch Instructions  
0C BASSM Branch and Save and Set Mode RR Branch Instructions  
0D BASR Branch And Store Register RR Branch Instructions  
0E MVCL MoVe Character Long RR Data Transfer Instructions  
0F CLCL Compare Logical Character Long RR Control Flow Instructions  
10 LPR Load Positive RR Data Transfer Instructions  
11 LNR Load Negative RR Data Transfer Instructions  
12 LTR Load and Test Register RR Data Transfer Instructions  
13 LCR Load and Compare Register RR Data Transfer Instructions  
14 NR aNd Register RR Data Transfer Instructions  
15 CLR Compare Logical Register RR Logic Instructions  
16 OR Or Register RR Data Transfer Instructions  
17 XR eXclusive-or Register RR Data Transfer Instructions  
18 LR Load Register RR Data Transfer Instructions  
19 CR Compare Register RR Logic Instructions  
1A AR Add Register RR Arithmetic Instructions  
1B SR Subtract Register RR Arithmetic Instructions  
1C MR Multiply Register RR Arithmetic Instructions  
1D DR Divide Register RR Arithmetic Instructions  
1E ALR Add Logical Register RR Arithmetic Instructions  
1F SLR Subtract Logical Register RR Arithmetic Instructions  
20 LPDR Load Positive RR Data Transfer Instructions  
21 LNDR Load Negative RR Data Transfer Instructions  
22 LTDR Load and Test RR Data Transfer Instructions  
23 LCDR Load Complement RR Data Transfer Instructions  
24 HDR Halve RR Arithmetic Instructions  
25 LDXR Load Double eXt. Rounded RR Arithmetic Instructions  
25 LRDR Load Rounded RR 360 Only Arithmetic Instructions  
26 MXR Multiply RR Arithmetic Instructions  
27 MXDR Multiply RR Arithmetic Instructions  
28 LDR Load RR Data Transfer Instructions  
29 CDR Compare Double Reg. RR Data Transfer Instructions  
2A ADR Add Double Register RR Arithmetic Instructions  
2B SDR Subtract Double Reg. RR Arithmetic Instructions  
2C MDR Multiply Double Reg. RR Arithmetic Instructions  
2D DDR Divide Double Reg. RR Arithmetic Instructions  
2E AWR Add Unnormalized RR Arithmetic Instructions  
2F SWR Subtract Unnormalized RR Arithmetic Instructions  
30 LPER Load Positive RR Data Transfer Instructions  
31 LNER Load Negative RR Data Transfer Instructions  
32 LTER Load and Test RR Data Transfer Instructions  
33 LCER Load Complement RR Data Transfer Instructions  
34 HER Halve RR Arithmetic Instructions  
35 LEDR Load Rounded RR Data Transfer Instructions  
35 LRER Load Rounded RR 360 Only Data Transfer Instructions  
36 AXR Add Normalized RR Arithmetic Instructions  
37 SXR Subtract Normalized RR Arithmetic Instructions  
38 LER Load RR Data Transfer Instructions  
39 CER Compare RR Logic Instructions  
3A AER Add Normalized RR Arithmetic Instructions  
3B SER Subtract Normalized RR Arithmetic Instructions  
3C MER Multiply Normalized RR Arithmetic Instructions  
3C MDER Multiply Dbl Ext. Reg RR Arithmetic Instructions  
3D DER Divide Normalized RR Arithmetic Instructions  
3E AUR Add Unnormalized RR Arithmetic Instructions  
3F SUR Subtract Unnormalized RR Arithmetic Instructions  
40 STH STore Halfword RX Data Transfer Instructions  
41 LA Load Address RX Data Transfer Instructions  
42 STC STore Character RX Data Transfer Instructions  
43 IC Insert Character RX Data Transfer Instructions  
44 EX EXecute RX Data Transfer Instructions  
45 BAL Branch And Link RX Branch Instructions  
46 BCT Branch on CounT RX Branch Instructions  
47 BC Branch on Condition RX Branch Instructions  
470 NOP No Operation RX Branch Instructions  
471 BO Branch on Overflow/Ones RX Branch Instructions  
472 BH Branch (a High) RX Branch Instructions  
472 BP Branch on Plus RX Branch Instructions  
474 BL Branch (a Low) RX Branch Instructions  
474 BM Branch on Minus/Mixed RX Branch Instructions  
477 BNE Branch Not Equal RX Branch Instructions  
477 BNZ Branch Not Zero RX Branch Instructions  
478 BE Branch (a Equal b) RX Branch Instructions  
478 BZ Branch on Zero RX Branch Instructions  
47B BNL Branch (a Not Low) RX Branch Instructions  
47B BNM Branch Not Minus RX Branch Instructions  
47D BNH Branch Not High RX Branch Instructions  
47D BNP Branch Not Plus RX Branch Instructions  
47E BNO Branch Not Ones RX Branch Instructions  
47F B Branch (unconditional) RX Branch Instructions  
48 LH Load Halfword RX Data Transfer Instructions  
49 CH Compare Halfword RX Logic Instructions  
4A AH Add Halfword RX Arithmetic Instructions  
4B SH Subtract Halfword RX Arithmetic Instructions  
4C MH Multiply Halfword RX Arithmetic Instructions  
4D BAS Branch And Store RX Branch Instructions  
4E CVD ConVert to Decimal RX Data Transfer Instructions  
4F CVB ConVert to Binary RX Data Transfer Instructions  
50 ST STore RX Data Transfer Instructions  
51 LAE Load Address Extended RX Other Instructions  
54 N aNd RX Data Transfer Instructions  
55 CL Compare Logical RX Logic Instructions  
56 O Or RX Data Transfer Instructions  
57 X eXclusive or RX Data Transfer Instructions  
58 L Load RX Data Transfer Instructions  
59 C Compare RX Logic Instructions  
5A A Add RX Arithmetic Instructions  
5B S Subtract RX Arithmetic Instructions  
5C M Multiply RX Arithmetic Instructions  
5D D Divide RX Arithmetic Instructions  
5E AL Add Logical RX Arithmetic Instructions  
5F SL Subtract Logical RX Arithmetic Instructions  
60 STD Store Double RX Data Transfer Instructions  
67 MXD Multiply Double RX Arithmetic Instructions  
68 LD Load Double RX Data Transfer Instructions  
69 CD Compare Double RX Logic Instructions  
6A AD Add Double RX Arithmetic Instructions  
6B SD Subtract Double RX Arithmetic Instructions  
6C MD Multiply Double RX Arithmetic Instructions  
6D DD Divide Double RX Arithmetic Instructions  
6E AW Add unnormalized (Word) RX Arithmetic Instructions  
6F SW Subtract unnormalized (Word) RX Arithmetic Instructions  
70 STE Store short RX Data Transfer Instructions  
71 MS Multiply Single RX Data Transfer Instructions  
78 LE Load short RX Data Transfer Instructions  
79 CE Compare short RX Logic Instructions  
7A AE Add normalized short RX Arithmetic Instructions  
7B SE Subtract normalized short RX Arithmetic Instructions  
7C ME Multiply short RX Arithmetic Instructions  
7D DE Divide short RX Arithmetic Instructions  
7E AU Add Unnormalized short RX Arithmetic Instructions  
7F SU Subtract Unnormalized short RX Arithmetic Instructions  
80 SSM Set System Mask RX Privileged Instructions  
82 LPSW Load Program Status Word RX Privileged Instructions  
83 DIAGNOSE Diagnose RX Privileged Instructions  
84 WRD Write Direct RX 360 Only Privileged Instructions  
84 BRXH Branch Register on indeX High RX Branch Instructions  
85 RDD Read Direct RX 360 Only Privileged Instructions  
85 BRXLE Branch Register on indeX Low or Equal RX Branch Instructions  
86 BXH Branch on indeX High RS Branch Instructions  
87 BXLE Branch on indeX Low or Equal RS Branch Instructions  
88 SRL Shift Right Logical RX Shift and Rotate Instructions  
89 SLL Shift Left Logical RX Shift and Rotate Instructions  
8A SRA Shift Right Arithmetic RX Shift and Rotate Instructions  
8B SLA Shift Left Arithmetic RX Shift and Rotate Instructions  
8C SRDL Shift Right Double Logical RX Arithmetic Instructions  
8D SLDL Shift Left Double Logical RX Arithmetic Instructions  
8E SRDA Shift Right Double Arithmetic RX Shift and Rotate Instructions  
8F SLDA Shift Left Double Arithmetic RX Shift and Rotate Instructions  
90 STM STore Multiple RX Data Transfer Instructions  
91 TM Test under Mask RX Logic Instructions  
92 MVI MoVe Immediate RX Data Transfer Instructions  
93 TS Test and Set RX Logic Instructions  
94 NI aNd Immediate RX Data Transfer Instructions  
95 CLI Compare Logical Immediate RX Logic Instructions  
96 OI Or Immediate RX Arithmetic Instructions  
97 XI eXclusive-or Immediate RX Data Transfer Instructions  
98 LM Load Multiple RS Data Transfer Instructions  
99 TRACE Trace RS Control Flow Instructions  
9A LAM Load Access Multiple RS Data Transfer Instructions  
9B STAM Store Access Multiple RS Data Transfer Instructions  
9C SIO Start I/O SI 360 Only Privileged Instructions  
9D TIO Test I/O SI Privileged Instructions  
9E HIO Halt I/O SI 360 Only Privileged Instructions  
9F TCH Test CHannel SI Privileged Instructions  
A50 IIHH Insert Immediate RI Other Instructions  
A51 IIHL Insert Immediate RI Other Instructions  
A52 IILH Insert Immediate RI Other Instructions  
A53 IILL Insert Immediate RI Other Instructions  
A54 NIHH And Immediate RI Other Instructions  
A55 NIHL And Immediate RI Other Instructions  
A56 NILH And Immediate RI Other Instructions  
A57 NILL And Immediate RI Other Instructions  
A58 OIHH Or Immediate RI Other Instructions  
A59 OIHL Or Immediate RI Other Instructions  
A5A OILH Or Immediate RI Other Instructions  
A5B OILL Or Immediate RI Other Instructions  
A5C LLIHH RI Other Instructions  
A5D LLIHL
A5E LLILH
A5F LLILL
A70 TMH Test under Mask High RI Control Flow Instructions  
A71 TML Test under Mask Low RI Control Flow Instructions  
A72 TMHH
A73 TMHL
A74 BRC Branch Relative on Condition RI Branch Instructions  
A75 BRAS Branch Relative and Save RI Branch Instructions  
A76 BRCT Branch Relative on Count RI Branch Instructions  
A77 BRCTG Branch Relative on Count RI Branch Instructions  
A78 LHI Load Halfword Immediate RI Data Transfer Instructions  
A79 LGHI
A7A AHI Add Halfword Immediate RI Arithmetic Instructions  
A7B AGHI
A7C MHI Multiply Halfword Immediate RI Arithmetic Instructions  
A7D MGHI
A7E CHI Compare Halfword Immediate RI Control Flow Instructions  
A7F CGHI
A8 MVCLE Move Long Extended RS Control Flow Instructions  
A9 CLCLE Compare Logical Long Extended RS Control Flow Instructions  
AC STNSM Store Then aNd System Mask SI Other Instructions  
AD STOSM Store Then Or System Mask SI Other Instructions  
AE SIGP Signal Processor RS Other Instructions  
AF MC Monitor Call SI Other Instructions  
B1 LRA Load Real Address RX Other Instructions  
B202 STIDP Store CPU ID S Other Instructions  
B204 SCK Set Clock S Other Instructions  
B205 STCK Store Clock S Other Instructions  
B206 SCKC Set Clock Comparator S Privileged Instructions  
B207 SCK Store Clock Comparator S Other Instructions  
B208 SPT Set CPU Timer S Privileged Instructions  
B209 STPT Store CPU Timer S Privileged Instructions  
B20A SPKA Set PSW Key From Address S Privileged Instructions  
B20B IPK Insert PSW Key S Privileged Instructions  
B20D PTLB Purge TLB S Privileged Instructions  
B210 SPX Set Prefix S Other Instructions  
B211 STPX Store Prefix S Other Instructions  
B212 STAP Store CPU Address S Other Instructions  
B214 SIE
B218 PC Program Call S Other Instructions  
B218 PCF Program Call Fast S Other Instructions  
B219 SAC Set Address Space Control S Other Instructions  
B21A CFC Compare and Form Codeword S Other Instructions  
B221 IPTE Invalidate Page Table Entry RRE Other Instructions  
B222 IPM Insert Program Mask RRE Other Instructions  
B223 IVSK Insert Virtual Storage Key RRE Privileged Instructions  
B224 IAC Insert Address Space Control RRE Privileged Instructions  
B225 SSAR Set Secondary ASN RRE Privileged Instructions  
B226 EPAR Extract Primary ASN RRE Privileged Instructions  
B227 ESAR Extract Secondary ASN RRE Privileged Instructions  
B228 PT Program Transfer RRE Privileged Instructions  
B229 ISKE Insert Storage Key Extended RRE Privileged Instructions  
B22A RRBE Reset Storage Key Extended RRE Privileged Instructions  
B22B SSKE Set Storage Key Extended RRE Privileged Instructions  
B22C TB Test Block RRE Privileged Instructions  
B22D DXR Divide RRE Data Transfer Instructions  
B22E PGIN Page In RRE Privileged Instructions  
B22F PGOUT Page Out RRE Privileged Instructions  
B230 CSCH
B231 HSCH
B232 MSCH
B233 SSCH
B234 STSCH
B235 TSCH
B236 TPI
B237 SAL
B238 RSCH
B239 STCRW
B23A STCPS
B23B RCHP
B23C SCHM
B240 BAKR Branch and Stack RRE Data Transfer Instructions  
B241 CKSM Checksum RRE Data Transfer Instructions  
B244 SQDR Square Root Long RRE Data Transfer Instructions  
B245 SQER Square Root Short RRE Data Transfer Instructions  
B246 STURA STore Using Real Address RRE Data Transfer Instructions  
B247 MSTA Modify Stacked state RRE Data Transfer Instructions  
B248 PALB Purge ALB RRE Data Transfer Instructions  
B249 EREG Extract Stacked Registers RRE Data Transfer Instructions  
B24A ESTA Extract Stacked State RRE Data Transfer Instructions  
B24B LURA Load Using Real Address RRE Data Transfer Instructions  
B24C TAR Test Access RRE Data Transfer Instructions  
B24D SQDR Square Root Long RRE Data Transfer Instructions  
B24E SAR Set Access RRE Data Transfer Instructions  
B24F EAR Extract Access RRE Data Transfer Instructions  
B250 CSP Compare and Swap and Purge RRE Control Flow Instructions  
B252 MSR Multiply Single RRE Data Transfer Instructions  
B254 MVPG Move Page RRE Data Transfer Instructions  
B255 MVST Move String RRE Data Transfer Instructions  
B257 CUSE Compare Until Substring Equal RRE Control Flow Instructions  
B258 BSG Branch in Subspace Group RRE Branch Instructions  
B25A BSA Branch and Set Authority RRE Branch Instructions  
B25D CLST Compare Logical String RRE Control Flow Instructions  
B25E SRST Search String RRE Control Flow Instructions  
B276 XSCH
B277 RP Resume Program S Branch Instructions  
B278 STCKE Store Clock Extended S Data Transfer Instructions  
B279 SACF Set Address Space Control Fast S Data Transfer Instructions  
B27D STSI Store System Information S Data Transfer Instructions  
B299 SRNM Set Rounding Mode S Data Transfer Instructions  
B29C STFPC Store FPC S Data Transfer Instructions  
B29D LFPC Load FPC S Data Transfer Instructions  
B2A5 TRE Translate Extended RRE Data Transfer Instructions  
B2A6 CUUTF Convert Unicode to UTF-8 RRE Data Transfer Instructions  
B2A7 CUTFU Convert UTF-8 to Unicode RRE Data Transfer Instructions  
B2B1 STFL Store Facility List S Data Transfer Instructions  
B2B2 LPSWE
B2FF TRAP4 Trap S Other Instructions  
B300 LPEBR Load Positive Short RRE Data Transfer Instructions  
B301 LNEBR Load Negative Short RRE Data Transfer Instructions  
B302 LTEBR Load and Test Short RRE Data Transfer Instructions  
B303 LCEBR Load Complement Short RRE Data Transfer Instructions  
B304 LDEBR Load Lengthened Short/Long RRE Data Transfer Instructions  
B305 LXDBR Load Lengthened Long/Extended RRE Data Transfer Instructions  
B306 LDEBR Load Lengthened Short/Extended RRE Data Transfer Instructions  
B307 MXDBR Multiply Long/Extended RRE Arithmetic Instructions  
B308 KEBR Compare and Signal Short RRE Control Flow Instructions  
B309 CEBR Compare Short RRE Control Flow Instructions  
B30A AEBR Add Short RRE Arithmetic Instructions  
B30B SEBR Subtract Short RRE Arithmetic Instructions  
B30C MDEBR Multiply Short/Long RRE Arithmetic Instructions  
B30D DEBR Divide Short RRE Arithmetic Instructions  
B30E MAEBR Multiply and Add Short RRE Arithmetic Instructions  
B30F MSEBR Multiply and Subtract Short RRE Arithmetic Instructions  
B310 LPDBR Load Positive Long RRE Data Transfer Instructions  
B311 LNDBR Load Negative Long RRE Data Transfer Instructions  
B312 LTDBR Load and test Long RRE Data Transfer Instructions  
B313 LCDBR Load Complement Long RRE Data Transfer Instructions  
B314 SQEBR Square Root Short RRE Data Transfer Instructions  
B315 SQDBR Square Root Long RRE Data Transfer Instructions  
B316 SQXBR Square Root Extended RRE Data Transfer Instructions  
B317 MEEBR Multiply Short RRE Data Transfer Instructions  
B318 KDBR Compare and Signal Long RRE Data Transfer Instructions  
B319 CDBR Compare Long RRE Data Transfer Instructions  
B31A ADBR Add Long RRE Arithmetic Instructions  
B31B SDBR Subtract Long RRE Arithmetic Instructions  
B31C MDBR Multiply Long RRE Arithmetic Instructions  
B31D DDBR Divide Long RRE Arithmetic Instructions  
B31E MADBR Multiply and Add Long RRE Arithmetic Instructions  
B31F MSDBR Multiply and Subtract Long RRE Arithmetic Instructions  
B324 LDER Load Lengthened Short/Long RRE Data Transfer Instructions  
B325 LXDR Load Lengthened Long/Extended RRE Data Transfer Instructions  
B326 LXER Load Lengthened Short/Extended RRE Data Transfer Instructions  
B32E MAER Multiply and Add Short RRE Arithmetic Instructions  
B32F MSER Multiply and Subtract Short RRE Data Transfer Instructions  
B336 SQXR Square Root Extended RRE Data Transfer Instructions  
B337 MEER Multiply and Subtract Short RRE Data Transfer Instructions  
B33E MADR Multiply and Add Long RRE Data Transfer Instructions  
B33F MSDR Multiply and Subtract Long RRE Data Transfer Instructions  
B340 LPXBR Load Positive Extended RRE Data Transfer Instructions  
B341 LNXBR Load Negative Extended RRE Data Transfer Instructions  
B342 LTXBR Load and Test Extended RRE Data Transfer Instructions  
B343 LCXBR Load Complement Extended RRE Data Transfer Instructions  
B344 LEDBR Load Rounded Long/Short RRE Data Transfer Instructions  
B345 LDXBR Load Rounded Extended/Long RRE Data Transfer Instructions  
B346 LEXBR Load Rounded Extended/Short RRE Data Transfer Instructions  
B347 FIXBR Load FP Integer Extended RRE Data Transfer Instructions  
B348 KXBR Compare and Signal Extended RRE Data Transfer Instructions  
B349 CXBR Compare Extended RRE Data Transfer Instructions  
B34A AXBR Add Extended RRE Data Transfer Instructions  
B34B SXBR Subtract Extended RRE Data Transfer Instructions  
B34C MXBR Multiply Extended RRE Data Transfer Instructions  
B34D DXBR Divide Extended RRE Data Transfer Instructions  
B350 TBEDR Convert Short to Long RRF Data Transfer Instructions  
B351 TBDR Convert Long RRF Data Transfer Instructions  
B353 DIEBR Divide to Integer Short RRF Data Transfer Instructions  
B357 FIEBR Load FP Integer Short RRF Data Transfer Instructions  
B358 THDER Convert Short to Long RRE Data Transfer Instructions  
B359 THDR Convert Long RRE Data Transfer Instructions  
B35B DIDBR Divide to Integer Long RRF Data Transfer Instructions  
B35F FIDBR Load FP Integer Long RRF Data Transfer Instructions  
B360 LPXR Load Positive Extended RRE Data Transfer Instructions  
B361 LNXR Load Negative Extended RRE Data Transfer Instructions  
B362 LTXR Load and Test Extended RRE Data Transfer Instructions  
B363 LCXR Load Complement Extended RRE Data Transfer Instructions  
B365 LXR Load Extended RRE Data Transfer Instructions  
B366 LEXR Load Rounded Extended/Short RRE Data Transfer Instructions  
B367 FIXR Load FP Integer Extended RRE Data Transfer Instructions  
B369 CXR
B374 LZER
B375 LZDR
B376 LZXR
B377 FIER
B37F FIDR
B384 SFPC
B38C EFPC
B394 CEFBR
B395 CDFBR
B396 CXFBR
B398 CFEBR
B399 CFDBR
B39A CFXBR
B3A4 CEGBR
B3A5 CDGBR
B3A6 CXGBR
B3A8 CGEBR
B3A9 CGDBR
B3AA CGXBR
B3B4 CEFR
B3B5 CDFR
B3B6 CXFR
B3B8 CFER
B3B9 CFDR
B3BA CFXR
B3C4 CEGR
B3C5 CDGR
B3C6 CXGR
B3C8 CGER
B3C9 CGDR
B3CA CGXR
B6 STCTL
B7 LCTL
B8 LMC Load Multiple Control RS Privileged Instructions  
B900 LPGR
B901 LNGR
B902 LTGR
B903 LCGR
B904 LGR
B905 LURAG
B908 AGR
B909 SGR
B90A ALGR
B90B SLGR
B90C MSGR
B90D DSGR
B90E EREGG
B90F LRVGR
B910 LPGFR
B911 LNGFR
B912 LTGFR
B913 LCGFR
B914 LLGFR
B916 LCGR
B917 LLGTR
B918 AGFR
B919 SGFR
B91A ALGFR
B91B SLGFR
B91C MSGFR
B91D DSGFR
B91F LRVR
B920 CGR
B921 CLGR
B925 STURG
B930 CGFR
B931 CLGFR
B946 BCTGR
B980 NGR
B981 OGR
B982 XGR
B986 MLGR
B987 DLGR
B988 ALCGR
B989 SLBGR
B98D EPSW
B990 TRTT
B991 TRTO
B992 TROT
B993 TROO
B996 MLR
B997 DLR
B998 ALCR
B999 SLBR
B99D ESEA
BA CS
BB CDS
BD CLM
BE STCM Store Characters under Mask
BF ICM Insert Characters under Mask
C00 LARL
C04 BRCL
C05 BRASL
D1 MVN MoVe Numeric SS Data Transfer Instructions  
D2 MVC MoVe Character SS Data Transfer Instructions  
D2 MVZ MoVe Zone SS Data Transfer Instructions  
D4 NC aNd Character SS Data Transfer Instructions  
D5 CLC Compare Logical Character SS Logic Instructions  
D6 OC Or Character SS Data Transfer Instructions  
D7 XC eXclusive-or Character SS Data Transfer Instructions  
D9 MVCK
DA MVCP
DB MVCS
DC TR TRanslate SS Data Transfer Instructions  
DD TRT TRanslate and Test SS Data Transfer Instructions  
DE ED EDit SS Data Transfer Instructions  
DF EDMK EDit and MarK SS Data Transfer Instructions  
E1 PKU
E2 UNPKU
E303 LRAG
E304 LG
E308 AG
E309 SG
E30A ALG
E30B SLG
E30C MSG
E30D DSG
E30E CVBG
E30F LRVG
E314 LGF
E315 LGH
E316 LLGF
E317 LLGT
E318 AGF
E319 SGF
E31A ALGF
E31B SLGF
E31C MSGF
E31D DSGF
E31E LRV
E31F LRVH
E320 CG
E321 CLG
E324 STG
E32E CVDG
E32F STRVG
E330 CGF
E331 CLGF
E33E STRV
E33F STRVH
E346 BCTG
E380 NG
E381 OG
E382 XG
E386 MLG
E387 DLG
E388 ALCG
E389 SLBG
E38E STPQ
E38F LPQ
E390 LLGC
E391 LLGH
E396 ML
E397 DL
E398 ALC
E399 SLB
E500 LASP
E501 TPROT
E502 STRAG
E50E MVCSK
E50F MVCDK
E8 MVCIN
E9 PKA
EA UNPKA
EB04 LMG
EB0A SRAG
EB0B SLAG
EB0C SRLG
EB0D SLLG
EB0F TRACG
EB1C RLLG
EB1D RLL
EB20 CLMH
EB24 STMG
EB25 STCTG
EB26 STMH
EB2C STCMH
EB2F LCTLG
EB30 CSG
EB3E CDSG
EB44 BXHG
EB45 BXLEG
EB80 ICMH
EB8E MVCLU
EB8F CLCLU
EB96 LMH
EBC0 TP
EC44 BRXHG
EC45 BRXLG
ED04 LDEB
ED05 LXDB
ED06 LXEB
ED07 MXDB
ED08 KEB
ED09 CEB
ED0A AEB
ED0B SEB
ED0C MDEB
ED0D DEB
ED0E MAEB
ED0F MSEB
ED10 TCEB
ED11 TCDB
ED12 TCXB
ED14 SQEB
ED15 SQDB
ED17 MEEB
ED18 KDB
ED19 CDB
ED1A ADB
ED1B SDB
ED1C MDB
ED1D DDB
ED1E MADB
ED1F MSDB
ED24 LDE
ED25 LXD
ED26 LXE
ED34 SQE
ED35 SQD
ED37 MEE
EE PLO
EF LMD
F0 SRP Shift and Round Packed SS Arithmetic Instructions  
F1 MVO Move with Offset SS Arithmetic Instructions  
F2 PACK PACK SS Arithmetic Instructions  
F3 UNPK UNPacK SS Arithmetic Instructions  
F8 ZAP Zero and Add Packed SS Arithmetic Instructions  
F9 CP Compare Packed SS Control Flow Instructions  
FA AP Add Packed SS Arithmetic Instructions  
FB SP Subtract Packed SS Arithmetic Instructions  
FC MP Multiply Packed SS Arithmetic Instructions  
FD DP Divide Packed SS Arithmetic Instructions  
360 Assembly Language
360 Family Introduction · Basic FAQ · 360 Family · 360 Architecture · Comments
360 Instruction Set 360 Instructions · Branch Instructions · Data Transfer Instructions · Control Flow Instructions · Arithmetic Instructions · Logic Instructions · Shift and Rotate Instructions · Other Instructions
Syntaxes and Assemblers 360 Assemblers· Pseudo Instructions
Instruction Extensions Floating Point · High-Level Languages