360 Assembly/360 Instructions/LGR
LGR - Add Register - 64 Bit - Opcode B904 - RRE Instruction
- LGR 2,6
The specific syntax is
- LGR target register, source register.
|RRE Instruction (4 bytes)|
|Bytes 1 and 2||Byte 3||Byte 4|
|target register||source register|
- The first argument is a target register which value is affected by the instruction.
- The second argument is the source value register.
The LGR instruction is 64-bit, and is only available on the 370 series and z/System. It will cause an opcode exception on the 360 series.
The LGR instruction copies a 64-bit value from the register specified by the second argument to the register specified by the first argument.
Condition codes are not changed.
Register 0 is valid for either register and is not ignored as in some other instructions.
Exceptions and Faults 
- 360 Series: Opcode Exception
- 370 Series and zSystem: None.
Related instructions 
32-Bit Instructions 
- To load an 8-bit byte (character) value from memory, see IC.
- To load one or more 8-bit byte values into a register according to a mask, see ICM
- To load a 16-bit half-word value from memory, see LH.
- To copy a 32-bit word value from one register to another register, see LR.
- To load a 32-bit word value from memory, see L.
- To store an 8-bit byte (character) value in memory, see STC.
- To store one or more 8-bit byte values into memory according to a mask, see STCM
- To store a 16-bit half-word value in memory, see STH.
- To store a 32-bit word value in memory, see ST.
64-Bit Instructions 
- To load a 32-bit value into a 32-bit register from an extended (20-bit) signed memory offset, see LY.
- To load a 32-bit value into a 64-bit register from an extended (20-bit) signed memory offset, see LGF.
- To copy a 64-bit value from one 64-bit register to another 64-bit register, see LGR.
- To load a 64-bit value into a 64-bit register from memory, see LG.
- To store a 32-bit value from a register to an extended (20-bit) signed memory offset, see STY.
- To store a 64-bit value from a 64-bit register to an address in memory, see STG.
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