Clock and Data Recovery/Conclusion

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Many things have changed..[edit]

Many things have evolved in the domain of CDRs during the recent decades, and –as a consequence- so has the work of the CDR engineers.

  • Unit cost. The CDR is often just a small section of a complex but tiny silicon chip. More than one CDR can be found inside the chip, and it may even happen that a series of almost identical ones, differing slightly in some critical circuit elements, are made inside the same chip. Just one of those CDRs will actually be used. The characteristics of certain critical circuit elements can not be chosen exactly in the first place because of their manufacturing variability. The one in the series that will come out of production better balanced is the one that is chosen. The other are left unused with little concern for their cost that is practically negligible.
  • Quantity manufactured of each design. On one side the unit cost declines with the improvement of the manufacturing technology, on the other each design happens to be manufactured in larger and larger quantities, following the trend of modern electronics.
  • Circuit complexity. Each circuit element can today be implemented using blocks of really complex circuitry, and there are more and more cases when the (slow speed) functions are made by dedicated software rather than by hardware.
  • Frequency. From MHz to GHz. The widespread use of media with THz of useful bandwidth, like the optical fiber, opens every day possibilities of higher speed applications. In parallel, the accuracy of the reference frequency has evolved from hundreds of ppm to ten ppm or less, and consumer electronics with frequency accuracy of the reference oscillator below 1 ppm are becoming common use.
  • Application specific CDR. General purpose CDRs have disappeared. In new systems and equipment, the CDR is defined for a very precise application. If the application is subject to change with the operating conditions of the equipment, more CDRs are present and the one best fitting the requirement is activated at any moment.
  • CAD tool versatility. For high level description, synthesis, simulations as well as for design for testability and for automatic generation of test software of the resulting circuit.
  • Test equipment versatility. The circuit can be stimulated, checked, characterized, troubleshooted to an extent that was unconceivable not many years ago.

Engineers can become lazy or neglect theory[edit]

The CDR engineer has become more and more dependent on predefined solutions of parts of his circuits, on software for simulation and circuit synthesis, on characterization and test equipment.
The engineer becomes specialized for just one task in the complex organization that deploys so many CDRs in the world.
The negative side of all this is the possibility to lose the ability to understand the circuit behavior. The need for an engineer to understand the CDR with its own intelligence may be neglected, and just hardware and software tools may be relied upon.
Such extremes may be rare, but it is not infrequent to find good technical literature on CDRs that could be improved if the author had a better knowledge and more command of the fundamental mathematical models.

Just three models are needed for a solid background[edit]

“All models are wrong; some models are useful” (George E. P. Box)

In the case of CDRs, it might be reworded as: “All CDR models are wrong; there are three models that are useful”
Many problems can be solved better, or quicker –if not avoided altogether-, if the engineer is familiar with and uses three simple mathematical models, because the fundamental behavior of every CDR can be referred to one of them:

  1. The phase aligner (1st order, 1st type)
  2. The regenerator (2nd order, 1st type)
  3. The robust, tolerant monolithic implementation with bang-bang detector and ring VCO (2nd order, 2nd type).

These three structures (1-1, 2-1, 2-2) out of two architectures (1st order and 2nd order) are the ones used in practice. How to choose among them?

The choice depends on whether the phase comparator (and/or the VCO) is linear or not
The 1st order loop models can be characterized by one parameter only, e.g. ωn1, where ωn1 = G = 1/τ.
The 2nd order loops models can be characterized by two parameters only, e.g. ωn2 and ζ2.
(in these 2nd order loops ωn1 can be expresed as a function of the other two parameters).
Fundamental parameters of the three CDR structures
 Loop order and type   Parameter   Important relations 
1 - 1 ωn1 ωn1 = G = 1/τ
2 - 1 ωn21 , ζ21 ωn21 = 2 ζ21 ωn1
ωn21 = ωf /2ζ21
G = ωn21 / 2ζ21
τf = 1 / 2ζ21ωn21
ζ212 =1 / ( 4 G τf)
ωn212 = G / τf
2 - 2 ωn22 , ζ22 ωn22 = ωn1 / 2 ζ22
ωn22 = 2 ζ22 ωz
G = 2 ζ22 ωn22
τz = 2ζ22 / ωn22
ζ222 = G τz / 4
ωn222 = G / τz

  • For the 2nd order loops, ωn1 can be expresed as a function of the other two parameters. For the 2-1 and 2-2 loops :
ωn1 = ωn21 / 2 ζ21 ; ωn1 = 2 ζ22 ωn22
e.g. if ωn2 = ωn1 , then, ζ = ½.
  • If the filtering caracteristics ( τf or τz ) are kept fixed, and just the open loop gain is varied, then the behaviour of the two 2nd order loops is different, almost "opposite":
2-1 ωn212 = G / τf and ζ212 =1 / ( 4 G τf)
the 2-1 gets less damped with more gain, i.e. more damped with less gain.
2-2 ωn222 = G / τz and ζ222 = G τz / 4
the 2-2 gets more damped with more gain, i.e.less damped with less gain !
This opposite behavior of ζ21 and of ζ22 with respect to the loop gain G explains why
2-1 is not used with bang-bang phase detectors nor VCOs, while
2-2 (not preferred whith phase comparator and VCO of linear type) becomes the preferred choice with bang-bang phase detectors (and VCOs).
  • The interesting characteristics of the 2-1 (rejection of the signal jitter, that make it preferred for regenerator applications) depends on a good control of the damping ratio, ζ21 . ζ21, in turn, depends on the loop gain G and decreases when G increases (risk of jitter peaking!): ζ212 =1 / ( 4 G τf).
The gain of the non linear blocks (bang bang detector and bang-bang VCO) is not constant, but varies with the signal amplitude. In particular, the bang-bang gain is maximum when the signal at the input of the blocks is very close to its center value. The gain is minimum instead when the signal deviates most from its center value.
Transfer curve and gain of the linear and of the bang-bang comparators as a function of the phase difference at their inputs

As a result, the three fundamental structures find their best fit as follows:

  1. 1st order
linear or non-linear blocks; preferred when Es is zero by definition (= for phase aligners). Preferred when the acquisition time shall be minimum (burst-mode transmission). Furthermore, it is a good choice in many cases when there are no specific requirements that suggest a 2nd order loop.
  1. 2nd order
    1. 2.1 type 1: preferred for regenerator applications when linear blocks are used.
    2. 2.2 type 2: preferred for applications where non-linear (= widely variable gain) blocks are used and in particular for high performance monolithic implementations.
Watches in a shop window: hardly two in sync!
Clocks in a shop window 2.jpg