360 Assembly/360 Instructions/LA

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LA - Load Address - Opcode 41 - RX format Instruction (32 Bit)


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LA 2,N2
LA 11,106(8,10)

The specific syntax is

LA target register,offset(index register,base register)

If a label is used instead of explicit index and base register and offset, then the offset, index register and base register values will be determined automatically by the assembler if the USING pseudo-instruction has been used, and the target address label used is within 4095 bytes of the value of some base register.

RX Instruction (4 bytes)
Byte 1 Byte 2 Bytes 3 and 4
target register Source Address
(8 bits)
(4 bits)

(4 bits)

(4 bits)

(12 bits)
  • The first argument is a target register which value is affected by the instruction.
  • The second argument is the address to be resolved.
  • The base_register and index_register values are 0 to 15. The offset value is 0 to 4095. If either or both base and index registers are specified as 0, the value of that register is presumed to contain 0.
  • In 31-bit mode, bit 0 is always cleared by this instruction. In 24-bit mode; bits 1-7 are also cleared.


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The LA instruction is available on all models of the 360, 370 and z/System.

Condition code

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This instruction does not alter the condition code.


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The LA instruction has three general uses.

  • To set a register to an immediate value from 0 to 4095 (use register 0 for the base and index registers and the amount to add as the displacement).
  • To add an immediate value from 1 to 4095 to any register except 0, either use register 0 for the index register, and the same register for the base and target registers, or use register 0 as the base register and the same register for the index and target registers, and the amount to add to that register as the displacement.
  • To set a register to any value up to 2^31 in 31-bit or 64-bit mode, or 2^24 in 24-bit mode. Use whichever register has the desired amount as the base (or index) register, if there is an additional amount to add, the value in an index (or base) register may be used, and, if desired, this may also be increased by the displacement address.
  • If the displacement is 0 and either (1) the base register is 0, and the index and target registers are the same (and are any register except 0), or (2) the index register is 0 and the base and target registers are the same (and any register except 0), the instruction is effectively a no-op (equivalent to an instruction to add 0 to the specified register).
  • If the displacement address, base and index registers are all zero, it zeros the target register (although the XR or SR instruction with both arguments the same would be faster and use less memory).

Note that unlike most instructions, the LA instruction is used to place a value into a register; the resulting address does not have to correspond to an actual address and is not checked for validity. Overflow cannot occur as the top bit of the result is always set to 0, and in 24-bit mode, the top 7 bits of the result are set to 0.

The LA instruction could be used to clear the value of a register by using 0 for the base, index and displacement values; the actual value in register 0 would not be used and the register would be zeroed. However, the SR or XR instruction with the same register number for both arguments will zero a register faster and produces a shorter instruction.


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The LA instruction computes either a 31-bit value (if the program is running in 31-bit or 64-bit address mode) or a 24-bit value from the address specified by the second argument and stores it in the register specified by the first argument, clearing the high bit (0) in 31-bit or 64-bit mode, and the high byte (bits 0-7) in 24-bit mode. The address is computed by using the base-displacement value of the address. The address value, from 0 to 4095, is added to the value of the contents of the base register (unless it is register 0, then it is presumed to contain zero). To this is added the value of the contents of the index register (unless it is register 0, then it is also presumed to contain zero). In 31-bit or 64-bit mode, the high bit is forced to 0. In 24-bit mode, the high byte is forced to 0. This total is then stored in the target register. This value does not have to be a valid address; while the LA instruction is often used to compute an address, it can be used to set the value of a register, e.g. a way to increment register 1 by 1 is the following:

LA 1, 1(0,1)

Or to increment register 7 by 5

LA 7, 5(0,7)

In some cases, (24- and 31-bit modes) the LA instruction is used to create addressing for program segments larger than 4095 bytes, by arranging a second register to point 4096 bytes after the first:

         BALR  12,0
         USING *,12,11
         LA    11,4095(0,12)      Register 0 explicitly stated as the index register
         LA    11,1(11)           Register 0 is implied for the Index register

In the above case, register 12 is the base register for the first 4096 bytes of the routine, and register 11 is the base register for the portion of the program above 4096 bytes.

Exceptions and Faults

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None. The address being generated is not checked for validity, and because in all modes (24-bit, 31-bit or 64-bit), bit 0 is always cleared, overflow cannot occur.

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The most closely-related instruction is Add Logical Register (ALR) and not Load Address (LA), as is sometimes assumed. Whereas L loads a value from memory, LA does not access memory; it only calculates a number, which can but does not have to be an address.

32-Bit Instructions

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  • To load an 8-bit byte (character) value from memory, see IC.
  • To load one or more 8-bit byte values into a register according to a mask, see ICM
  • To load a 16-bit half-word value from memory, see LH.
  • To load a 12-bit unsigned value into a register or add up to 4095 to the values in one or two 32-bit registers, see LA.
  • To copy a 32-bit word value from one register to another register, see LR.
  • To load a 32-bit word value from memory, see L.
  • To store an 8-bit byte (character) value in memory, see STC.
  • To store one or more 8-bit byte values into memory according to a mask, see STCM
  • To store a 16-bit half-word value in memory, see STH.
  • To store a 32-bit word value in memory, see ST.

64-Bit Instructions

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  • To load a 20-bit signed value into a 32-bit or 64-bit register from an extended (20-bit) signed memory offset, see LAY.
  • To load a 32-bit value into a 64-bit register from an extended (20-bit) signed memory offset, see LGF.
  • To copy a 64-bit value from one 64-bit register to another 64-bit register, see LGR.
  • To load a 64-bit value into a 64-bit register from memory, see LG.
  • To store a 32-bit value from a register to an extended (20-bit) signed memory offset, see STY.
  • To store a 64-bit value from a 64-bit register to an address in memory, see STG.
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