360 Assembly/360 Instructions/BCT

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BCT — Branch on Count — Opcode 46 / Decimal 70 — 4 byte RX Instruction. 


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BCT  target_register,displacement (index_register,base_register)
  BCT 15,106(10)
  BCT 0,256(7,6)
RX Instruction (4 bytes)
Byte 1 Byte 2 Bytes 3 and 4
target register Branch address
(In Hex) (8 bits)
(4 bits)

(4 bits)

(4 bits)

(12 bits)
  • The first argument is a target register which value is affected by the instruction.
  • The second argument is the address to branch to. This consists of a base register, an index register, and a displacement address. The displacement is used as an unsigned offset of 0 to 4095 from the value in the base register, and this displacement is added to the value contained in the base register. If the index register is 0, it is ignored; otherwise, its contents are added to the previous result to obtain the final address.
  • The base_register and index_register values are 0 to 15. The offset address is 0 to 4095.

The target and base_register values will be determined automatically by the assembler if the USING pseudo-instruction has been used, and the target address label used (the displacement) is within 4096 bytes of the value of some base register.


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The BCT instruction is available on all models, 360, 370 and z/System.

Purpose of Instruction

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The BCT instruction subtracts 1 from the value of the contents of the target register specified in the first argument. If the value in the target register after the subtraction is zero, no branch occurs. Otherwise the program branches to the specified address. Note that if the result in the target register before subtraction is 0, the result is negative 1 and the branch occurs. If the value in the target register before subtraction is the smallest possible value, the result is the highest possible value, the overflow is ignored and the branch occurs.

Typical Usage

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To do a loop statement where 1 is subtracted from the value contained in the target register, and a branch should occur if the result is not 0.


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The value contained in the target register specified as the first argument is reduced by 1. If the value after subtraction is 0, execution continues with the instruction following this instruction. Otherwise, execution transfers to the address specified as the second argument.

Condition Codes

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Condition codes are not changed. If the value is the lowest possible value and overflow to the highest value occurs, it is ignored.

Exceptions and Faults

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  • If the address to branch to is not in the same PSW storage key (unless this process' storage key is 0) a protect violate exception occurs.
  • If the address to branch to is odd, an address exception occurs.
  • If the address is not within available memory, a specification exception occurs.

Alternative branch instructions

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  • The BCTR instruction provides the same functionality but with the branch address in another register.
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