360 Assembly/360 Instructions/AR

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AR - Add Register - Opcode 1A

Format[edit]

AR 2,1

The specific syntax is

AR target register, source register.
RR Instruction (2 bytes)
Byte 1 Byte 2
target register source register
(8 bits)
Opcode
1A
(4 bits)

0..F
(4 bits)

0..F
  • The first argument is a target register which value is affected by the instruction.
  • The second argument is the source value register.

Availability[edit]

The AR instruction is available on all models of the 360, 370 and z/System.

Operation[edit]

The AR instruction reads 32-bit integer value from the register specified by the second argument and adds it to the value of register specified by the first argument. The Condition Code field in the Program Status Word is changed according to the resulting value.

Condition Codes[edit]

If signed integer overflow occurs, i.e. sum is not between -2**31 and 2**31-1, CC is set to 3. Otherwise, CC is set to 0, 1 or 2, if sum is equal to zero, below zero or above zero accordingly.

Exceptions and Faults[edit]

  • If signed integer overflow is detected and the bit 36 in PSW is set, operation exception occurs.

Related instructions[edit]

  • To add word value from memory, see A.
  • To add half-word value from memory, see AH.
  • To add value and set condition codes according to unsigned arithmetic, or add not most significant part of multi-word integer value, see AL or ALR.
  • To add floating-point values, see AE, AER, AD or ADR.
  • To subtract an integer value from register, see SR, S, SH, SL or SLR.
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