File:Full-Adder Propagation Delay.svg

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Full-Adder_Propagation_Delay.svg‎ (SVG file, nominally 400 × 225 pixels, file size: 44 KB)

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Description
English: A diagram of a Full adder, with the longest propagation delays from the inputs to the outputs marked.
Date

18 January 2009(2009-01-18)
Source

Own work
Author

Inductiveload
Permission
(Reusing this image)
Public domain I, the copyright holder of this work, hereby release it into the public domain. This applies worldwide.

In case this is not legally possible:
I grant anyone the right to use this work for any purpose, without any conditions, unless such conditions are required by law.

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File history

Click on a date/time to view the file as it appeared at that time.

Date/TimeThumbnailDimensionsUserComment
current07:29, 14 May 2009Thumbnail for version as of 07:29, 14 May 2009400×225 (44 KB)Inductiveload (new version showing all longest paths)
20:25, 18 January 2009Thumbnail for version as of 20:25, 18 January 2009400×180 (30 KB)Inductiveload ({{Information |Description={{en|1=A diagram of a en:Full adder, with the maximum length path (assuming all gate delays are identical) indicated in red. This is the path that is considered when calculating en:Propagation delay of the circuit.}})

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