Template:360 opcode RR

From Wikibooks, open books for an open world
Jump to navigation Jump to search
RR Instruction (2 bytes)
Byte 1
bits (0-7)
Byte 2
target register
source register
(in hex) Opcode
(4 bits)
0..F / (dec 0..15)
(4 bits)
0..F / (dec 0..15)
  • The first argument is a target register which value is affected by the instruction.
  • The second argument is the source register.
  • The target register and source register values are 0 to 15.

Usage for this template:

  • {{360 opcode RR|opcode}}
  • {{360 opcode RR|opcode|M}} or
  • {{360 opcode RR|opcode|B}} or
  • {{360 opcode RR|opcode|I}}

Where opcode is the 2-digit hexadecimal opcode value and the optional value of

  • M is used when the first parameter is a mask rather than a register
  • B when the second parameter contains a branch address
  • I when the only parameter is an 8-bit immediate value (the SVC instruction)