Practical Electronics/IC/4071

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IC Family CMOS
Function Family Logic
Description Quad 2-Input OR Gate
Pins 14
Functional Diagram
Basic TTL Counterpart 7432
Truth Table (One Gate)
A B   Q
0 0   0
0 1   1
1 0   1
1 1   1

The 4071 is a member of the 4000 Series CMOS range, and contains four independent CMOS OR gates, each with two inputs. The pinout diagram, given on the right, is the standard two-input CMOS logic gate IC layout:

  • Pin 7 is the negative supply
  • Pin 14 is the positive supply
  • Pins 1&2, 5&6, 8&9, 12&13 are gate inputs
  • Pins 3, 4, 10, 11 are gate outputs

The truth table for one of the four gates is shown to the right. For more information about the OR gate in general, see this module. The arrangement of the CMOS components is shown below:

This chip is widely available, and usually comes in a DIL-14 or SOIC-14 package.

This chip is different in pinout to the TTL 7432, but can fulfill the function of its counterpart if the wiring is modified.

Alternative Construction[edit | edit source]

If a 4071 is not available, there are several ways to achieve an OR gate. The first is to use a NOR gate and invert the output. This can be done with a NOT gate or another NOR gate. The first method will require two ICs to implement, but a total of four gates can be made. The second will require only one IC, but only two gates can be made. Incidentally, due to the nature of CMOS devices, this gate actually produces the OR function by inverting the output of a NOR gate (see above).

NAND gates can also be used in the configuration below to make an OR gate.

Similar ICs[edit | edit source]

As well as the standard 2-Input OR Gate, 3-, 4- and 8-Input OR Gates are also available:

  • 4075: Triple 3-Input OR Gate
  • 4072: Dual 4-Input OR Gate

OR gates with more inputs can be made up from the 4071 or any of the above ICs by cascading them together. This is discussed on this page.

Datasheets[edit | edit source]

These are available from manufacturers. A selection of different manufacturers' datasheets is given below: