Microprocessor Design/Multi Cycle Processors
Single-cycle processors suffer from poor speed performance. Control and data signals must propagate completely through the processor in a single cycle, which means that cycle times need to be long, and many parts of the hardware tend to be dormant for much of the cycle.
Multi-Cycle Stages[edit | edit source]
Multi-cycle processors break up the instruction into its fundamental parts, and executes each part of the instruction in a different clock cycle. Since signals have less distance to travel in a single cycle, the cycle times can be sped up considerably.
Typically, an instruction is executed over at least 5 cycles, which are named as such:
- Fetch the instruction from memory
- Decode the instruction, and generate the necessary control signals
- Feed the necessary control signals into the ALU and produce a result
- Read from memory, if specified
- Write the result back to the register file or to memory.
This is just a textbook example, and modern processors tend to use much more steps than this to execute an instruction.
Hardware Reuse[edit | edit source]
The primary benefit to a multicycle design is to be able to share hardware elements, specifically the ALU, among various tasks. In a multicycle processor, a single ALU can be used to update the instruction pointer (in the IF cycle), perform the operation (in the EX cycle), and calculate a necessary memory address (in the MEM cycle). Multicycle processors also allow computers that have a single memory unit, instead of the two separate instruction and data memory units of the traditional harvard machine. This is because the instructions are loaded on one cycle, and the data memory is interfaced on another cycle.
Multi-cycle processors are typically used in applications where resources are at a premium, and speed is not as important.