Microprocessor Design/Basic Components
There are a number of components in a common microprocessor that designers should be familiar with before attempting a design. For an overview of these components, see Digital Circuits.
A register is a storage element typically composed of an array of smaller, 1-bit storage elements called flip-flops. The number of bits that the register is composed of equals the number of bits that the register can store at any given time. For example, a 1-bit register can store 1 bit, and a 32-bit register can hold 32 bits, etc. Registers can be any length.
A register has two inputs, a data input and a clock input. The clock input is typically called the "enable". When the enable signal is high, the register stores the data input. When the clock signal is low, the register value stays the same.
A register file is a whole collection of registers, typically all of which are the same length. A register file takes three inputs, an index address value, a data value, and an enable signal. A signal decoder is used to pass the data value from the register file input to the particular register with the specified address. We talk more about register files in a later section of this book, Register File.
A multiplexer is an input selector. A multiplexer has an output, a control input, and several data inputs. For ease, we number multiplexer inputs from zero, at the top. If the control signal is "0", the 0th input is moved to the output. If the control signal is "3", the 3rd input is moved to the output.
A multiplexer with N control signal bits can support 2N inputs. For example, a multiplexer with 3 control signals can support 23 = 8 inputs.
Multiplexers are typically abbreviated as "MUX", and will be abbreviated as such throughout the rest of this book.
|A 4 input Multiplexer with 2 control signal wires||An 8 input Multiplexer with 3 control signal wires|
|A 16 input Multiplexer with 4 control wires|
There can be decoders implemented in the components.
Decoder ( inverse functionality of Encoder) can have multiple inputs and depending upon the inputs one of the output signals can go high.
For a 2 input decoder there will be 4 output signals.
/|- O0 i0---| |- O1 i1---| |- O2 \|- O3
suppose input i is having value 00 then output signal O0 will go high and remaining other three lines O1 to O3 will be low. In same fashion if i is having value 2 then output O2 will be high and remaining other three lines will be low.