MIPS Assembly/Miscellaneous Instructions
These instructions conditionally move values between registers. Because they do not change the PC, they do not cause the same pipeline hazards as branches and are therefore faster.
If rt = 0 then rd ← rs.
If rt ≠ 0 then rd ← rs.
Immediate Load Instructions
Loads the upper 16 bits of the rt with the imm and fills the lower 16 bits with zeros. Used with ori, which doesn't sign-extend the immediate, these two instructions can be used to fill a register with a 32-bit constant.
A pseudoinstruction that loads a 32-bit constant into the target register. Assemblers will translate this into a lui/ori combination.