Digital Circuits/Sigma-Delta Modulators
A Sigma-Delta Modulator (ΣΔ modulator) allows to operate Analog to Digital Conversion (ADC) or Digital to Analog Conversion (DAC) by the means of a one-bit signal.
The usage of a single bit signal is also used by Pulse-Width Modulation (PWM), where the Signal-to-Noise Ratio (SNR) is worse but the switching is slower.
Application[edit | edit source]
ΣΔ modulation is a good candidate for medium-speed ADC and for very high precision low-speed ADC. Symmetrically, ΣΔ modulation is interesting for signal-level DAC. Compared to PWM, its higher switching speed is redhibitory for high-power (class-D) switching, at least with conventional silicon devices.
ΣΔ modulation is widely used for audio signal conversion and coding.
Analog model[edit | edit source]
The most simple (first order) analog-to digital ΣΔ modulator is made out of an integrator and a comparator. The comparator triggers when the integrator output has reached a given level. That signal is sampled, and if it has reached the trigger level, then a given quantity is taken out of the integrator, due to the negative feedback. Having the integrator output stabilized around the trigger value, plus/minus one feedback pulse amplitude, means that the mean number of feedback pulses is proportional the input amplitude.
The digital signal is given as a sequence of pulses whose mean value corresponds to the analog input signal. In order to retrieve a Pulse-Code Modulation (PCM) signal from this bit stream, a lowpass filter is to be used.
If the phase of the result is of importance, then 2 types of filters are of interest:
- the Cascaded Integrator Comb filter (CIC), which is a optimized circuit for calculating a running average
- a filter with a maximally flat group delay such as the Bessel Filter
Digital circuit[edit | edit source]
First Order Modulator[edit | edit source]
The digital counterpart of the first order analog ΣΔ modulator consists out of an accumulator and a comparator.
The function of this circuit is very similar to the one of the analog modulator. Here too, the output is a bit stream and a full-fledged analog signal requires a lowpass filter to reconstruct a copy of the original digital input signal.
Here, the lowpass filter is analog. A close to linear phase is achieved with the use of a filter with a maximally flat group delay.
When its input is constant, a first order modulator will provide a cyclic pattern. This pattern can become quite long for specific input values, and this leads to low-frequency ringing tones in the modulated signal. As these tones go lower in frequency, they become more and more difficult to separate from the original signal. Higher order modulators show less repetitive patterns and are thus preferred to first order ones.
Second Order Modulator[edit | edit source]
A second order ΣΔ modulator will require 2 accumulators. Different topologies are possible. The following circuit shows a typical second order circuit.
The 2 coefficients allow to control the digital to analog transfer function together with the corresponding noise shaping characteristic.
The analysis of the modulator transfer function allows to choose optimal values for the coefficients c1 and c2.