Digital Signal Processing/Sigma-Delta modulation

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A Sigma-Delta Modulator (ΣΔ modulator) allows to operate Analog to Digital Conversion (ADC) or Digital to Analog Conversion (DAC) by the means of a one-bit signal.

The usage of a single bit signal is also used by Pulse-Width Modulation (PWM), where the Signal-to-Noise Ratio (SNR) is worse but the switching slower.

First Order Modulator[edit | edit source]

Circuit[edit | edit source]

The first order ΣΔ modulator consists out of an accumulator and a comparator.

Modulator - first order - digital
Modulator - first order - digital

The output is a bit stream and the original signal can be reconstruted by the means of a lowpass filter.

Analysis[edit | edit source]

The frequency response of the sigma-delta modulator can be analysed by replacing the comparator with the addition of an error signal.

From these equations, one finds the Signal Transfer Funtion (STF)

and the Noise Transfer Funtion (NTF)

The STF is a one period delay but the NTF is a first order highpass function. This indicates that the modulation noise, due to the switching, occupies higher frequencies. If the input signal is limited to low frequencies, it is possible to separate the signal from the nois using a lowpass filter. As the highpass transfer function decreases by 20 dB/decade (or 6 dB/octave) as the frequency decreases, the signal to noise ratio increases by the same rate. Integrating the noise amplitude over the signal band shows that a first order modulator gains a signal to noise ration of 1.5 bit per octave. This can be compared to PCM which shows a gain of only 1 bit per octave.

When its input is constant, a first order modulator will provide a cyclic pattern. This pattern can become quite long for specific input values, and this leads to low-frequency ringing tones in the modulated signal. As these tones go lower in frequency, they become more and more difficult to separate from the original signal. Higher order modulators show less repetitive patterns and are thus preferred to first order ones.

Second Order Modulator[edit | edit source]

Circuit[edit | edit source]

A second order ΣΔ modulator will require 2 accumulators. Different topologies are possible. The following circuit shows a typical second order circuit.

The 2 coefficients allow to control the digital to analog transfer function together with the corresponding noise shaping characteristic.

Analysis[edit | edit source]

Here too, the comparator can be replaced by the insertion of an error signal:

The NTF and STF can be found from the following equations:

which can be rewritten as:

Signal Transfer Function[edit | edit source]

The STF is found by writing , which gives:

This can be rewritten in the state space representation as:

The state-space matrices are built from the modulator matrices as:

Solving the system for the second order modulator gives:

Noise Transfer Function[edit | edit source]

The NTF is found by writing , which gives:

This can be rewritten in the state space representation as:

The state-space matrices are built from the modulator matrices as:

Solving the system for the second order modulator gives:

Comments[edit | edit source]

The matrices contain all the information to both simulate and analyse the behaviour of any sigma-delta modulator. The derivation of the state-space description of the NTF and the STF from these matrices is generally applicable to any sigma-delta modulator.

The matrices and are identical, which means that the STF and the NTF share the same poles. The STF has only poles and this results in a lowpass function. The NTF has 2 poles at , which gives a high pass response. This ensures that the signal and the noise are well separable.

The STF has a DC gain of:

A STF DC gain of 1 is achieved by multiplying the input by .

Design[edit | edit source]

The poles of the STF are given by

This equation allows to arbitrarily place the poles of the STF. For a pair of poles at:

the modulator coefficients are:

As an example, an all-pole Butterworth STF with cutoff frequency at 1/4 the sampling frequency give poles:

and coefficients:

An all-pole close to Bessel STF with cutoff frequency around 1/4 the sampling frequency give coefficients:

Note that the usual habits of using coefficients or both result in having poles exactly on the unit circle, which is not recommended in terms of stability.

Higher order topologies[edit | edit source]

For higher order modulators, different topologies exist[1].

Simplified Chain of Integrators with FeedBack (SCIFB)[edit | edit source]

The following picture shows a Simplified Chain of Integrators with FeedBack (SCIFB) modulator [2]:

Modulator SCIFB - order 3
Modulator SCIFB - order 3

With coefficient different from zero, this is a structure with a local resonator.

For this structure, the system equations are:

and the matrices are:

References[edit | edit source]

  1. Norsworthy, Steven R.; Schreier, Richard; Temes, Gabor C. (1997). Delta-Sigma Data Converters. IEEE Press. ISBN 0-7803-1045-4.
  2. Liu, Mingliang (2003), The Design of Delta-Sigma Modulators for Multi-Standard RF Receivers