VHDL for FPGA Design

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This book requires that you first read Digital Circuits.

This book is intended for advanced readers.

Wikiversity has course materials on EE 215 VHDL for FPGA Design.

Wikipedia has related information at VHDL

[edit] Preface

For exercices you need ISE WebPACK. It is the FREE, fully featured front-to-back FPGA design solution for Linux, Windows XP, and Windows Vista. Download WebPACK

[edit] Combinational Logic

1. Decoder
2. Multiplexer
3. Priority Encoder
4. 4-Bit Adder
5. 4-Bit Multiplier
6. 4-Bit ALU

[edit] Sequential Logic

1. D Flip Flop
2. T Flip Flop
3. JK Flip Flop
4. 4-Bit Binary Counter with Parallel Load
5. 4-Bit BCD Counter with Clock Enable
6. 4-Bit Shift Register
7. 4-Bit Johnson Counter with Reset

[edit] State-Machine

1. State-Machine Design Example Asynchronous Counter
2. State-Machine Design Example Serial Parity Generator

[edit] Design Exercises

1. Example Application Serial Adder
2. Example Application Using PicoBlaze
3. Complete synthesisable VHDL code for Signed 32 bit Radix-16 multiplier - http://sites.google.com/site/vikramtheonesite/what-ever-is-mine-is-yours

[edit] Further Reading

[edit] Wikimedia Resources

• Embedded Systems
• Digital Circuits
• Programmable Logic
• Semiconductors
• Computer Science:Logic

A reader has identified this book as an undeveloped draft or outline. You can help to develop the work, or you can ask for assistance in the project room.