Programmable Logic/Verilog Control Structures

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Programmable Logic

Contents 1 Procedural Code 2 If-Else 3 For 4 While 5 Switch-Case 6 Code Blocks

[edit] Procedural Code

Verilog has a number of high-level control structures that can be used to perform complicted tasks with some level of abstraction. These control structures should be familiar to people who have experiance programming in high-level computer software languages, such as C or Java.

It is important to note that not all constructs in verilog are compatable with these high-level control structures. Wires and continuous assignments are not generally compatable with these structures, and trying to combine them may either lead to compiler errors or synthesis errors.

[edit] If-Else

IF structures test a particular condition, and execute the following code statement if that condition is true. Following an IF block can be an optional ELSE block, that will be executed if the condition is not true.

IF-ELSE structures can be expanded to account for more then two possibilities by nesting. The pseudocode example below demonstrates this:

if (<condition 1>)
  <statement 1>
else if(<condition 2>)
  <statement 2>
else if(<condition 3>)
  <statement 3>
...
else 
  <statement n>

It is worth noting that additional resources will be generated to handle conditions that aren't accounted for in the IF-ELSE chain. This means that it is typically more efficient to account for all possibilities then to ignore some.

[edit] For

[edit] While

A WHILE loop executes repeatedly, so long as the condition is true. The condition is tested before each execution of the loop.

[edit] Switch-Case

SWITCH-CASE structures are similar to nested IF-ELSE structures, except they tend to reduce to more efficient hardware structures.

SWITCH

CASE

CASEX

CASEZ

[edit] Code Blocks

Code blocks are designated through use of the keywords begin and end. Code blocks can be put anywhere that a single statement is valid, but where more then one statement needs to be executed.

Code blocks can be nested.

Variables declared in a code block are lexically scoped to that block.