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This page is going to talk about the arithmetic instructions of the MIPS architecture.
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[edit] Register Arithmetic Instructions
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add |
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R Type |
This instruction adds the two operands together, and stores the result in the destination register. Negative numbers are handled automatically using Two's Complement Notation. This means that different instructions do not need to be used for signed and unsigned numbers.
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sub |
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R Type |
The sub instruction subtracts the first operand from the second operand, and stores the result in the destination. In pseudo-code, the operation performs the following:
rd = rs - rt
[edit] Multiplication and Division
The multiply and divide operations are slightly different from other operations. Even if they are R-type operations, they only take 2 operands. The result is stored in a special 64-bit result register. We will talk about the result register after this section.
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mult |
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R Type |
This operation multiplies the two operands together, and stores the result in rd. Multiplication operations must differentiate between signed and unsigned quantities, because the simplicity of Two's Complement Notation does not carry over to multiplication. The mul instruction multiplies and sign extends signed numbers.
The result of multiplying 2 32-bit numbers is a 64-bit result. We will discuss the 64-bit results below.
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multu |
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R Type |
The multu instruction multiplies the two operands together, and stores the result in rd. This instruction is for unsigned numbers only, and does not sign extend a negative result. This operation also creates a 64-bit result.
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div |
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R Type |
The div instruction divides the first argument by the second argument. The quotient is stored in the lowest 32-bits of the result register. The remainder is stored in the highest 32-bits of the result register. Like multiplication, division requires a differentiation between signed and unsigned numbers. This operation uses signed numbers.
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divu |
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R Type |
Like the div instruction, this operation divides the first operand by the second operand. The quotient is stored in the lowest 32-bits of the result, and the remainder is stored in the highest 32-bits of the result. This operand divides unsigned numbers, and will not sign-extend the result.
[edit] 64-Bit Results
The 64-bit result register is broken into two 32-bit segments: HI and LO. We can interface with these registers using the mfhi and mflo operations, respectively.
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mfhi |
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R Type |
Takes only 1 operand. This instruction moves the high-32 bits of the result register into the target register.
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mflo |
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R Type |
Also takes only 1 operand. Moves the value from the LO part of the result register into the specified register.
[edit] Register Logic Instructions
These operations perform bit-wise logical operations on their operands.
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and |
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R Type |
Performs a bitwise AND operation on the two operands, and stores the result in rd.
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or |
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R Type |
Performs a bitwise OR operation on the two operands, and stores the result in rd.
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nor |
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R Type |
Performs a bitwise NOR operation on the two operands, and stores the result in rd.
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xor |
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R Type |
Performs a bitwise XOR operation on the two operands, and stores the result in rd.
[edit] Immediate Arithmetic Instructions
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addi |
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I Type |
Adds an immediate 16-bit value to the destination register:
addi $1, $2, 255
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subi |
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I Type |
Subtracts an immediate 16-bit value from the register
[edit] Immediate Logic Instructions
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andi |
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I Type |
Ands the register with a 16 bit immediate value.
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ori |
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I Type |
Ors the register with a 16 bit immediate value.
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xori |
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I Type |
Xors the register with a 16 bit immediate value.
[edit] Shift instructions
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sll |
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R Type |
Logical shift left.
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srl |
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R Type |
Logical shift right.
